1. Technical Field
The present disclosure pertains to the manufacture of integrated electronic circuits, and more specifically relates to integration of microstructures and other structures onto a substrate.
2. Background Art
The incredible growth in wireless, Internet, opto-electronic communications, and biomedical application has created a need for low-cost, high-performance Microsystems, xyz on a chip, lab on a chip, etc., capable of receiving, processing, and transmitting large amounts of data quickly and precisely. However, the increasing use of millimeter-wave and optical channels for communications has made highly integrated, all-silicon communication chips impossible, because of silicon's ineffectiveness in optical and ultra-high speed applications. Instead, these functions are performed with one of three types of circuits: monolithic microwave integrated circuits (MMICs), opto-electronic integrated circuits (OEICs), or hybrid circuits. MMICs and OEICs can perform not only their optical or microwave functions, but also all of their data processing, using GaAs or InP substrates. This can result in inefficient utilization of the expensive III-V material. On the other hand, hybrid circuits include separate chips performing various functions of different materials, such as silicon chips for signal processing and III-V electronic devices to perform microwave or optical functions. The benefits of heterogeneous integration of high performance electrical, micro-electro-mechanical, and optoclectronic devices together onto the same substrate include lower parasitic losses, lower system weight, lower packaging costs, and increased reliability. Ultimately, such benefits have the potential to provide reduced cost, better performance microsystems.
Integrating different materials and different device functions has wide application in the market. But there are inherent problems in combining different materials. Such problems can include differences in thermal expansion coefficient between different materials. For example, the thermal expansion mismatch between silicon, the primary material of interest for large-scale high-density integrated circuits, and III-V compounds, the materials of interest for optoelectronic and microwave devices and circuits, is very large.
As the market for low cost and high performance electronic, optoelectronic, and electromechanical integrated circuits increases, many new assembly and integration techniques must be developed. For example, it has become increasingly important to integrate high performance low cost electronic, optoelectronic and/or radio frequency components onto dissimilar substrates. To improve system performance and reduce assembly cost, often compound semiconductor devices must be integrated monolithically to active circuitry contained in the substrate. Of primary interest among these is integrating such devices with silicon CMOS (Complementary Metal Oxide Semiconductor) technology, in order to increase the number of on-wafer functions available, and ultimately reduce the cost, size and weight of the micro-device based system.
Current integration strategies that rely on “pick and place” serial assembly techniques can encounter speed and cost constraints in applications that require the assembly of large numbers of microscale components with high positioning precision. In addition, surface forces must be carefully controlled to prevent unwanted adhesion of microscopic parts to each other, or to tool surfaces. Because of these disadvantages, new low-cost parallel assembly techniques are being investigated and commercialized.
As the dimensions of micro-electronic, micro-optoelectronic and micro-electromechanical devices and systems decrease, and as their complexity increases, there are good reasons to consider the use of self assembly and integration techniques to simplify the processing of these devices.
Some efficient approaches of heterogeneous integration include aligning separate discrete dice without individual manipulation of the devices. Such approaches include vector potential parts manipulation, DNA and electrophoresis-assisted assembly, and fluidic self-assembly techniques. These techniques each involve the assembling and integration of many individual units on processed integrated circuits (or other electronic substrates). The individual units (or microstructures) may be a single device, small assemblies of devices or fully integrated circuits.
The vector potential parts manipulation process allows for the alignment of separate devices in an assembly. This process most often uses electrostatics, to direct and place units. Units are placed on a vibrating stage and are attracted to potential wells on the substrate. As the vibration is reduced, the units position into place. At present, this method has been used to manipulate relatively large parts using high voltages in a specially prepared alignment fixture.
In the DNA and electrophoresis-assisted assembly technique, a DNA-like polymer film is formed on the individual parts and a complementary film is patterned on the wafer or on the circuit surface where the parts are to be placed. The attraction force between the two complementary DNA films then locates and holds the parts in position. An electrophoresis approach is also used to attract and place device parts on a surface electrode pattern.
Other approaches, such as the one described in U.S. Pat. No. 4,542,397, Biegelsen et al., involve methods for placing structures onto a substrate by mechanical vibration. Such methods may also employ pulsating air through apertures in the substrate.
In the fluidic self-assembly approach, carefully etched devices are placed in a substrate with etched recesses of matching dimensions. The host substrate is patterned with deep recesses that match the shape of the device. The specially shaped devices are separated from the growth substrate, suspended in a fluid, and flowed over the surface of the host substrate, and gravity is relied upon to get the devices into the recesses and to hold them there.
Despite efforts to date, a need remains for new systems and methods of assembling and integrating microstructures onto silicon wafers or other substrates that are cost-effective, compact, efficient, reliable, and/or require minimum maintenance; that can be carried out in such a manner to avoid damaging the preexisting electronics on the substrate; that take full advantage of very large diameter silicon wafers; and/or that facilitate transferring individual elements fabricated on an original substrate to pre-determined locations on a new substrate. These and other needs are satisfied by the systems and methods disclosed herein, as will be apparent from the description which follows.